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R2 MF Receiver DSP C Code
Description: detects dual-tone signals to ITU Q.441 R2 signalling format. R2 transmission is done by choosing tone-pair combinations from the following two 6-tone groups:
| Forward direction | Backward direction |
| 1380/1500/1620/1740/1860/1980Hz | 1140/1020/ 900/ 780/ 660/ 540Hz |
The
composite tone signal can send one of 15 digits (6C2 = 15) in each direction
according to the digit code set.
The
C code is suitable for any processor with an ANSI-compliant C compiler.
It is designed especially for efficient operation on low-cost fixed-point
DSP- and general-purpose micro-processors. All data memory is specified
as 16-bit integer words. Multiplies are integer 16x16-bit with 32-bit
products.
The software is in the form of 4 callable subroutines:
two are for loading default parameters and initialising per-channel memory,
one is for accessing any newly detected digit, and the main one is for
per-sample processing. It can easily be used in a multi-channel mode:
a pointer is set to each per-channel block of memory at each sub-routine
call. By making multiple sub-routine calls, the code can be operated on
blocks of samples.
The code is near load-balanced
so there is no significant MIPS variation per sample. To suit application,
some digit detection parameters are made user-programmable. Operation
can be at 8.0kHz or 9.6kHz sample rates. A user's guide is supplied.
Specification:
the conditions under which R2 digit states are registered either a new
digit when in the "pause" state or else a pause(non-digit) when
in the "digit" state are as follows. The symbols Pth, Rtw signify
that the parameter is user-programmable. All levels are per R2 tone.
| Parameter: | Digit detected | Digit NOT detd. | Notes |
| Frequency offset: | <= 10Hz | - | - |
| Signal level threshold*: | >= Pth (Pth >= -45dBm) | < Pth & >= -3dBm | Per tone +6dBm is peak |
| Twist*: | <= Rtw (Rtw<= 10dB) | > Rtw | - |
| Signal duration: | >= 36ms | <= 18ms | - |
| Inter-digit pause*: | >= 27ms | <= 18ms | - |
The receiver is designed to pass the ITU Q.455 requirements.
Processor Load:
| MIPS# | Data memory (words) | Prog memory (bytes)# |
| 0.93 | 2(common)+20(per channel) | 0.71k |
-
#example figures from compiling for the TI TMS320C5000(C55x) DSP processor
at 8.0kHz sampling
Availability: NOW - sale is under licence - integration support offered
